Analog Design in Thin Line-Width Technologies: Challenges and Design Strategies

The rapid progress of semiconductor technologies enables the integration of huge amount of transistors on the same chip but creates new problems for digital and analog designers. The very high speed of operation allows millimeterwave CMOS circuits but various limits challenge the analog designer that must find new solutions. Key limits are the intrinsic gain of MOS transistors, the gate leakage current, matching and reliability. Moreover, the reduced supply voltage ties down the analog dynamic range. However, the intrinsic power reduction and the increased availability of processing power are possibilities that analog designer can use to sustain with analog or digitally assisted methods the circuit performances.